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ks86c4004/p4004/c4104/p4104 product overview 1 - 1 1 product overview sam87r i product family samsung's sam87ri family of 8-bit single-chip cmos microcontrollers offers a fast and efficient cpu, a wide range of integrated peripherals, and various mask-programmable rom sizes. a address/data bus architecture and a large number of bit- configurable i/o ports provide a flexible programming environment for applications with varied memory and i/o requirements. timer/counters with selectable operating modes are included to support real-time operations. ks86c4004/c4104 microcontroller the ks86c4004/c4104 single-chip 8-bit microcontroller is fabricated using an advanced cmos process. it is built around the powerful sam87ri cpu core. the ks86c4004/c4104 is a versatile microcontroller , with its a/d converter and a zero-crossing detection capability it can be used in a wide range of general purpose applications. stop and idle power-down modes were implemented to reduce power consumption. to increase on-chip register space, the size of the internal register file was logically expanded. the ks86c4004/c4104 has 4 - kbytes of program memory on-chip (rom) and 208-bytes of general purpose register area ram . using the sam87ri design approach, the following peripherals were integrated with the sam87ri core: ? four configurable i/o ports (ks86c4004: 2 2 pins , ks86c4104: 16 pins ) ? six interrupt s ources with one vector and one interrupt level ? two 8-bit timer/counter with various operating modes ? analog to digital converter (ks86c4004: 8-bit, 8-channel, ks86c4104: 10-bit, 5-channel) ? one zero cross detection module the ks86c4004/c4104 microcontroller is ideal for use in a wide range of electronic applications requiring simple timer/counter, pwm, adc, zcd and capture functions. ks86c4004 is available in a 30- pin sdip and a 32-pin sop package. ks86c4104 is available in a 24-pin sdip and a 24-pin sop package. otp the ks86p4004/p4104 is an otp (one time programmable) version of the ks86c4004/c4104 microcontroller. the ks86p4004/p4104 has on-chip 4-kbyte one-time programmable eeprom instead of masked rom. the ks86p4004/p4104 is fully compatible with the ks86c4004/c4104, in function, in d.c. electrical characteristics and in pin configuration.
product overview ks86c4004/p4004/c4 104/p4104 1 - 2 features cpu ? sam87ri cpu core memory ? 4-kbyte internal program memory (rom) ? 208-byte general purpose register area (ram) instruction set ? 41 instructions ? idle and stop instructions added for power-down modes. instruction execution time ? 600 n s at 10 mhz f osc (minimum) interrupts ? 6 interrupt sources with one vector and o ne level interrupt structure oscillation frequency ? 1 mhz to 10 mhz external crystal oscillator ? maximum 10 mhz cpu clock ? 4 mhz rc oscillator general i/o ? four i/o ports (2 2 pins for ks86c4004, 16 pins for ks86c4104 ) ? bit programmable ports a/d converter ? eight anal og input pins ? 8-bit conversion resolution (ks86c4004) ? 10-bit conversion resolution (ks86c4104) timer/counter ? one 8-bit ba sic timer for watchdog function ? one 8- bit timer/counter wit h three operating modes (10-bit pwm 1ch ) ? one 8-bit timer/counter for the zero-crossing detection circuit zero-crossing detection circuit ? zero-crossing detection circuit that generates a digital signal in synchronism with an ac signal input buzzer frequency range ? 200 hz to 20 khz signal ca n be generated operating temperature range ? ? 4 0 c to + 85 c operating voltage range ? 2.7 v to 5.5 v otp interface protocol spec ? serial otp package types ? 3 0-pin s dip , 32-pin sop for ks86c4004/p4004 ? 2 4-pin sdip, 24-pin sop for ks86c4104/p4104
ks86c4004/p4004/c4104/p4104 product overview 1 - 3 block diagram port 0 port 2 sam87ri cpu p0.0-p0.7 4-kb rom 208-byte register file port 3 p3.0 - p3.5 / adc0-adc5 port 1 p1.0 - p1.3 / zcd,buz,t0,clo p1.0/ zcd i/o port i/o and interrupt control p2.0-p2.3 / int0-int1 / adc6-adc7 timer 0 timer 1 zcd adc osc basic timer adc0 -adc7 p1.1/buz t0(pwm) x in x out figure 1 -1 . block diagram
product overview ks86c4004/p4004/c4 104/p4104 1 - 4 pin assignments v ss x in x out test p0.1 p0.0 reset p3.5/adc5 p3.4/adc4 p3.3/adc3 p3.2/adc2 p3.1/adc1 p3.0/adc0 a v ss a v ref v dd p0.2 p0.3 p0.4 p0.5 p0.6 p0.7 p1.0 / zcd p1.1 / buz p1.2 / t0(pwm) p1.3 / clo p2.0 / int0 p2.1 / int1 p2.2 / adc6 p2.3 / adc7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 ks86c4004 30-sdip (top view) figure 1 -2 . pin assignment diagram ( 30 -pin s dip package)
ks86c4004/p4004/c4104/p4104 product overview 1 - 5 v ss x in x out test p0.1 p0.0 reset nc p3.5/adc5 p3.4/adc4 p3.3/adc3 p3.2/adc2 p3.1/adc1 p3.0/adc0 a v ss a v ref v dd p0.2 p0.3 p0.4 p0.5 p0.6 p0.7 nc p1.0 / zcd p1.1 / buz p1.2 / t0(pwm) p1.3 / clo p2.0 / int0 p2.1 / int1 p2.2 / adc6 p2.3 / adc7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 ks86c4004 32-sop (top view) figure 1 -3 . pin assignment diagram ( 32 -pin sop package)
product overview ks86c4004/p4004/c4 104/p4104 1 - 6 v ss x in x out test p0.1 p0.0 reset p3.4/adc4 p3.3/adc3 p3.2/adc2 p3.1/adc1 p3.0/adc0 v dd p0.2 p0.3 p0.4 p0.5 p0.6 p1.0 / zcd p1.1 / buz p1.2 / t0(pwm) p2.0 / int0 a v ref a v ss 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 ks86c4104 24-sdip (top view) figure 1 -4 . pin assignment diagram ( 24 -pin sdip package)
ks86c4004/p4004/c4104/p4104 product overview 1 - 7 v ss x in x out test p0.1 p0.0 reset p3.4/adc4 p3.3/adc3 p3.2/adc2 p3.1/adc1 p3.0/adc0 v dd p0.2 p0.3 p0.4 p0.5 p0.6 p1.0 / zcd p1.1 / buz p1.2 / t0(pwm) p2.0 / int0 av ref a v ss 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 ks86c4104 24-sop (top view) figure 1 -5 . pin assignment diagram ( 24 -pin sop package)
product overview ks86c4004/p4004/c4 104/p4104 1 - 8 pin descriptions table 1 - 1. ks86c4004/c4104 pin descriptions pin names pin type pin description circuit type share pins p0.0-p0.7 i/o bit-programmable i/o port for normal input or push-pull, open-drain output. pull-up resistors are assignable by software. e-2 p1.0-p1.3 i/o bit-programmable i/o port for schmitt trigger input or push-pull output. pull-up resistors are assignable by software. port 1 pins can also be used as alternative functions. f d d d zcd buz t0(pwm) clo p2.0-p2.3 i/o bit-programmable i/o port for schmitt trigger input or push-pull , open drain output. pull up resistors are assignable by software. port 2 can also be used as external interrupt, a/d input . e e-1 int0?int1 adc6?adc7 p3.0-p3.5 i/o bit-programmable i/o port for schmitt trigger input or push-pull output. pull-up resistors are assignable by software. port 3 pins can also be used as a/d converter input. f adc0?adc5 x in , x out ? crystal/ceramic, or rc oscillator signal for system clock. ? ? int 0?int1 i external interrupt input. e p2.0?p2.1 reset i system reset signal input pin. b ? test i test signal input pin (for factory use only: must be connected to v ss ) ? ? v dd , v ss ? voltage input pin and ground ? ? av ref, a v ss ? a/d converter reference voltage input and ground ? ? zcd i zero crossing detector input f p1.0 buz o 200 hz?20 khz frequency output for buzzer sound d p1.1 t0 i/o timer 0 capture input or 10-bit pwm output d p1.2 clo o system clock output port d p1.3 adc0?adc7 i a/d converter input f e-1 p3.0?p3.5 p2.2?p2.3 note : port 0.7, p1.3, p2.1?p2.3 and p3.5 is not available in ks86c4104/p4104 .
ks86c4004/p4004/c4104/p4104 product overview 1 - 9 pin circuits p - channel in n - channel v dd figure 1 -6 . pin circuit type a pull-up resistor v dd in figure 1 -7 . pin circuit type b v dd p-channel data output disable n-channel out figure 1 -8 . pin circuit type c p-channel pull-up resistor resistor enable data output disable in/out v dd circuit type c data figure 1 -9 . pin circuit typ e d
product overview ks86c4004/p4004/c4 104/p4104 1 - 10 input v dd pull-up enable n - ch p - ch v dd pull-up resistor data output disable in/out pne figure 1 -10 . pin circuit type e v dd pull-up enable n - ch p - ch v dd pull-up resistor data output disable in/out pne digital input analog input figure 1 -11 . pin circuit type e-1 input v dd pull-up enable n - ch p - ch v dd pull-up resistor data output disable in/out pne figure 1 -10 . pin circuit type e-2 in/out v dd pull-up resistor v dd circuit type c digital input data output disable pull-up enable analog input figure 1 -12 . pin circuit type f
ks86c4004/p4004/c4104/p4104 electrical data 13 - 1 13 electrical data overview in this section, the following ks86c4004/c4104 electrical characteristics are presented in tables and graphs: ? absolute maximum ratings ? d.c. electrical characteristics ? a.c. electrical characteristics ? oscillator characteristics ? oscillation stabilization time ? operating voltage range ? schmitt trigger input characteristics ? data retention supply voltage in stop mode ? stop mode release timing when initiated by a reset ? a/d converter electrical characteristics ? zero-crossing detector ? zero crossing waveform diagram
electrical data ks86c4004/p4004/c4 104/p4104 13 - 2 table 1 3- 1. absolute maximum ratings (t a = 25 c) parameter symbol conditions rating unit supply voltage v dd ? ? 0.3 to + 6.5 v input voltage v i all input ports ? 0.3 to v dd + 0.3 v output v oltage v o all output ports ? 0.3 to v dd + 0.3 v output c urrent i oh one i/o pin active ? 18 ma high all i/o pins active ? 60 output current i ol one i/o pin active + 30 ma l ow total pin current for ports 1, 2, 3 + 100 total pin current for ports 0 + 200 operating temperature t a ? ? 40 to + 85 c storage temperature t stg ? ? 65 to + 150 c table 1 3- 2. dc electrical characteristics (t a = ? 4 0 c to + 85 c, v dd = 2. 7 v to 5.5 v) parameter symbol conditions min typ max unit input high v oltage v i h1 ports 1,2,3, and reset v dd = 2.7 to 5.5 v 0. 8 v dd ? v dd v v i h2 port 0 0.7 v dd v i h3 x in and x out v dd ?0.1 input low v oltage v i l1 ports 1,2,3, and reset v dd = 2.7 to 5.5 v ? ? 0.2 v dd v v i l2 port 0 0.3 v dd v i l3 x in and x out 0.1 out put high v oltage v oh i oh = ? 1 m a ports 0, 1, 2, 3 v dd = 4.5 to 5.5 v v dd ? 1.0 ? ? v output low v oltage v o l1 i o l = 15 m a port 0 v dd = 4. 5 to 5.5 v ? 0.4 2.0 v v o l2 i o l = 4 m a port 1,2,3 v dd = 4. 5 to 5.5 v 0.4 2.0
ks86c4004/p4004/c4104/p4104 electrical data 13 - 3 table 1 3- 2. dc electrical characteristics (continued) (t a = ? 40 c to + 85 c, v dd = 2.7 v to 5.5 v) parameter symbol conditions min typ max unit input h igh l eakage current i lih1 all input s except i lih2 v in = v dd ? ? 1 a i lih2 x in , x out v in = v dd 20 input l ow l eakage current i lil1 all inputs except i lil2 and reset v in = 0 v ? ? ? 1 a i lil2 x in , x out v in = 0 v ? 20 output h igh l eakage c urrent i loh all outputs v out = v dd ? ? 2 a output l ow l eakage c urrent i lol all outputs v out = 0 v ? ? ? 2 a pull-up r esistors r p v in = 0 v ports 0 ? 3 v dd = 5 v 30 47 70 k w v dd = 3 v 30 280 350 supply c urren t i dd1 run mode 10 mhz cpu clock v dd = 5 v 10% ? 7.5 15 ma 8 mhz cpu clock v dd = 3 v 10% 3 6 i dd2 idle mode 10 mhz cpu clock v dd = 5 v 10% 2 5 8 mhz cpu clock v dd = 3 v 10% 0.7 2.5 i dd3 stop mode v dd = 5 v 10% 0.1 5 a v dd = 3 v 10% note: d.c. electrical values for supply current (i dd1 to i dd3 ) do not include current drawn through internal pull-up resisters, output port drive current, zcd and adc.
electrical data ks86c4004/p4004/c4 104/p4104 13 - 4 table 1 3- 3. ac electrical characteristics (t a = ? 20 c to + 85 c, v dd = 2.7 v to 5.5 v) parameter symbol conditions min typ max unit interrupt input high, low width t inth , t intl p ort 2 v dd = 5v 10% ? 200 ? ns input l ow width zcd noise filter t rsl ? input v dd = 5v 10% ? 1 ? s t nf1l t nf1h 0.8 v dd t rsl t nf2 0.2 v dd 1 t cpu note : the unit t cpu means one cpu clock period. figure 13 -1 . input timing measurement points
ks86c4004/p4004/c4104/p4104 electrical data 13 - 5 table 1 3-4 . oscillator characteristics (t a = ? 40 c to + 85 c) oscillator clock circuit test condition min typ max unit main crystal or ceramic c2 x in x out c1 v dd = 4. 5 to 5.5 v v dd = 2.7 to 4.5 v 1 1 ? ? 10 8 mhz external clock x in x out v dd = 4. 5 to 5.5 v v dd = 2.7 to 4.5 v 1 1 ? ? 10 8 rc oscillator r x in x out v dd = 4.75 to 5.25 v r = 8.2k ? 4 (p1.3/ clo) ? table 1 3-5 . oscillation stabilization time (t a = ? 40 c to + 85 c, v dd = 2.7 v to 5.5 v) oscillator test condition min typ max unit main crystal f osc > 1.0 mhz ? ? 20 ms main ceramic oscillation stabilization occurs when v dd is equal to the minimum oscillator voltage range. ? ? 10 external clock (main system) x in input high and low width (t xh , t xl ) 25 ? 500 ns oscillator stabilization t wait when released by a reset (1) ? 2 1 6 /f osc ? ms wait time t wait when released by an interrupt (2) ? ? ? notes : 1 . f osc is the oscillator frequency. 2 . the duration of the oscillator stabilization wait time, t wait , when it is released by an interrupt is dete r mined by the setting s in the basic timer control register, btcon.
electrical data ks86c4004/p4004/c4 104/p4104 13 - 6 cpu clock 1 mhz supply voltage (v) 2 mhz 3 mhz 4 mhz 8 mhz 10 mhz 2 3 4 5 6 7 1 2.7 5.5 figure 13 -2 . operating voltage range v dd v ss v out a b c d v in a = 0.2 v dd b = 0.4 v dd c = 0.6 v dd d = 0.8 v dd 0.3 v dd 0.7 v dd figure 13 -3 . schmitt trigger input characteristics diagram
ks86c4004/p4004/c4104/p4104 electrical data 13 - 7 table 1 3-6 . data retention supply voltage in stop mode (t a = ? 40 c to + 85 c , v dd = 2.7 v to 5.5v ) parameter symbol conditions min typ max unit data retention supply voltage v dddr stop mode 2.0 ? 5.5 v data retention supply current i dddr stop mode; v dddr = 2.0 v ? 0.1 5 a note: supply current does not include current drawn through internal pull-up resistors or external output current loads. t wait v dd reset execution of stop v dddr data retention mode stop mode internal reset idle mode (basic timer active) 0.8 v dd 0.2 v dd normal operating mode ~ ~ ~ ~ ~ ~ ~ ~ note: twait is the same as 4096 x 16 x 1/f osc figure 13 -4 . stop mode release timing when initiated by a reset
electrical data ks86c4004/p4004/c4 104/p4104 13 - 8 table 13-7. a/d converter electrical characteristics (ks86c4004) (t a = ? 40 c to + 85 c , v dd = 2.7 v to 5.5 v, v ss = 0 v ) ks86c4004: 8-bit adc parameter symbol test conditions min typ max unit total accuracy v dd = 5.12 v ? ? 2 lsb integral linearity error ile cpu clock = 10 mhz av ref = 5.12 v ? 1.5 differential linearity error dle av ss = 0 v ? 1 offset error of top eot ? 1 2 offset error of bottom eob ? 1 2 conversion time (1) t con fcpu = 10 mhz 5 ? ? m s analog input voltage v ian ? av ss ? av ref v analog input impedance r an ? 2 ? ? m w adc reference voltage av ref ? 2.5 ? v dd v adc reference ground av ss ? v ss ? v ss + 0.3 v analog input current i adin av ref = v dd = 5 v conversion time = 5 m s ? ? 10 m a adc block current (2) i adc av ref = v dd = 5 v conversion time = 5 m s ? 1 3 ma av ref = v dd = 3 v conversion time = 5 m s 0.5 1.5 av ref = v dd = 5 v power down mode ? 100 500 na notes: 1. ?conversion time? is the time required from the moment a conversion operation starts until it ends. 2. i adc is operating current during a/d conversion.
ks86c4004/p4004/c4104/p4104 electrical data 13 - 9 table 13-8. a/d converter electrical characteristics (ks86c4104) (t a = ? 40 c to + 85 c , v dd = 2.7 v to 5.5 v, v ss = 0 v ) ks86c4104: 10-bit adc parameter symbol test conditions min typ max unit resolution ? 10 ? bit total accuracy v dd = 5.12 v ? ? 3 lsb integral linearity error ile cpu clock = 10 mhz av ref = 5.12 v ? 2 differential linearity error dle av ss = 0 v ? 1 offset error of top eot 1 3 offset error of bottom eob 0.5 2 conversion time (1) t con 10-bit conversion 50 x 4/ f osc (3) 20 ? ? m s analog input voltage v ian ? av ss ? av ref v analog input impedance r an ? 2 ? ? m w analog reference voltage av ref ? 2.5 ? v dd v analog ground av ss ? v ss ? v ss + 0.3 v analog input current i adin av ref = v dd = 5 v conversion time = 20 m s ? ? 10 m a analog block current (2) i adc av ref = v dd = 5 v conversion time = 20 m s 1 3 ma av ref = v dd = 3 v conversion time = 20 m s 0.5 1.5 ma av ref = v dd = 5 v when power down mode 100 500 na notes: 1. "conversion time" is the time required from the moment a conversion operation starts until it ends. 2. i adc is operating current during a/d conversion. 3. f osc is the main oscillator clock.
electrical data ks86c4004/p4004/c4 104/p4104 13 - 10 table 13-9. zero crossing detector (t a = ? 40 c to + 85 c , v dd = 4.5 v to 5.5 v, v ss = 0 v ) parameter symbol test conditions min typ max unit zero-crossing detection input voltage v zc ac connection c = 0.1 m f 1.0 ? 3.0 vp-p zero-crossing detection accuracy v azc f zc = 60 hz (sine wave) v dd = 5 v f osc = 10 mhz ? ? 150 mv zero-crossing detection input frequency f zc ? 40 ? 200 hz ac input zcint 1/f zc v azc v az(p-p) figure 13 -5 . zero crossing waveform diagram
ks86c4004/p4004/c4104/p4104 electrical data 13 - 11 10 30 50 60 70 2 0 0 0.0 0.5 1 .0 1 .5 2 .0 2 .5 3 .0 3 .5 4 .0 4 .5 5 .0 5 .5 v o l (v) i o l (ma) v dd = 4.5 v v dd = 5.0 v v dd = 5.5 v 4 0 figure 13 -6 . i ol vs. v ol (p0, ta = 25 c)
electrical data ks86c4004/p4004/c4 104/p4104 13 - 12 10 30 50 2 0 0 0.0 0.5 1 .0 1 .5 2 .0 2 .5 3 .0 3 .5 4 .0 4 .5 5 .0 5 .5 v o l (v) i o l (ma) v dd = 4.5 v v dd = 5.0 v v dd = 5.5 v 4 0 figure 13 -7 . i ol vs. v ol (p1?p3, ta = 25 c)
ks86c4004/p4004/c4104/p4104 electrical data 13 - 13 - 8 - 36 - 20 - 32 - 28 0 0.0 0.5 1 .0 1 .5 2 .0 2 .5 3 .0 3 .5 4 .0 4 .5 5 .0 5 .5 v o h (v) i o h ( ma) - 4 - 16 - 24 - 12 v dd = 4.5 v v dd = 5.0 v v dd = 5.5 v figure 13 -8 . i oh vs. v oh (p0, ta = 25 c)
electrical data ks86c4004/p4004/c4 104/p4104 13 - 14 - 8 - 20 0 0.0 0.5 1 .0 1 .5 2 .0 2 .5 3 .0 3 .5 4 .0 4 .5 5 .0 5 .5 v o h (v) i o h ( ma) - 4 - 16 - 24 - 12 v dd = 4.5 v v dd = 5.0 v v dd = 5.5 v figure 13 -9 . i oh vs. v oh (p1?p3, ta = 25 c)
ks86c4004/p4004/c4104/p4104 mechanical data 1 4- 1 1 4 mechanical data overview the ks86c4004/c4104 is available in a 30 -pin s dip package (samsung: 30 - s dip- 4 00) and a 32 -pin so p package ( 32 - sop - 450a), a 24-pin sdip p ackage (24-sdip-300) and a 24-pin sop package (24-sop-375). package dimensions are shown in figures 1 4- 1 , 14-2, 14-3, and 1 4-4 . note : dimensions are in millimeters. 30-sdip-400 8.94 0.2 #1 #15 #30 #16 0-15 0.25 +0.1 ? 0.05 10.16 1.12 0.1 0.51min 3.81 0.2 3.30 0.3 5.08max (1.30) 0.56 0.1 27.48 0.2 27.88 max 1.778 figure 1 4- 1. 30 -pin s dip package dimensions
mechanical data ks86c4004/p4004/c4104/p4104 1 4- 2 0~8 0.20 +0.10 - 0.05 8.34 0.2 0.78 0.2 11.43 #1 #16 #32 #17 32-sop-450a 12.00 0.3 note : dimensions are in millimeters. 19.90 0.2 0.10 max 0.0min 2.00 0.2 2.40max (0.43) 0.40 0.1 1.27 figure 1 4- 2. 32 - sop-450a package dimensions
ks86c4004/p4004/c4104/p4104 mechanical data 1 4- 3 note : dimensions are in millimeters. 7.62 0-15 0.25 +0.1 ? 0.05 24-sdip-300 6.40 0.2 #1 #12 #24 #13 0.51min 3.25 0.2 3.30 0.3 5.08max 22.95 0.2 23.35 max (1.69) 0.89 0.1 0.46 0.1 1.778 figure 1 4-3 . 24 - sdip-300 package dimensions
mechanical data ks86c4004/p4004/c4104/p4104 1 4- 4 note : dimensions are in millimeters. 7.50 0.2 0-8 0.85 0.20 9.53 0.15 +0.10 - 0.05 0.10 max 0.05min 2.30 0.2 2.70max 15.34 0.2 15.74 max (0.69) 0.38 0.1 24-sop-375 10.30 0.3 #1 #12 #24 #13 1.27 figure 1 4-4 . 24 - sop-375 package dimensions
ks86c4004/p4004/c4104/p4104 ks86p4004/p4104 otp 1 5- 1 15 ks86p4004/p4104 otp overview the ks86p4004/p4104 single-chip cmos microcontroller is the otp (one time programmable) version of the ks86c4004/c4104 microcontroller. it has an on-chip otp rom instead of masked rom. the eprom is accessed by serial data format. the ks86p4004/p4104 is fully compatible with the ks86c4004/c4104 , both in function and in pin configuration. because of its simple programming requirements, the ks86p4004/p4104 is ideal for use as an evaluation chip for the ks86c4004/c4104 . v ss /v ss x in x out v pp /test p0.1 p0.0 p3.5/adc5 p3.4/adc4 p3.3/adc3 p3.2/adc2 p3.1/adc1 p3.0/adc0 av ss a v ref v dd/ v dd p0.2/ sclk p0.3/ sda t p0.4 p0.5 p0.6 p0.7 p1.0/zcd p1.1/buz p1.2/t0(pwm) p1.3/clo p2.0/int0 p2.1/int1 p2.2/adc6 p2.3/adc7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 ks86p4004 30-sdip (top view) note : the bolds indicate an otp pin name. reset reset/ figure 1 5-1 . pin assignment diagram ( 30 -pin s dip package)
ks86p4004/p4104 otp ks86c4004/p4004/c4 104/p4104 15- 2 v ss /v ss x in x out v pp /test p0.1 p0.0 nc p3.5/adc5 p3.4/adc4 p3.3/adc3 p3.2/adc2 p3.1/adc1 p3.0/adc0 av ss a v ref v dd/ v dd p0.2/ sclk p0.3/ sda t p0.4 p0.5 p0.6 p0.7 nc p1.0/zcd p1.1/buz p1.2/t0(pwm) p1.3/clo p2.0/int0 p2.1/int1 p2.2/adc6 p2.3/adc7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 ks86p4004 32-sop (top view) note : the bolds indicate an otp pin name. reset reset/ figure 1 5-2 . pin assignment diagram ( 32 -pin sop package)
ks86c4004/p4004/c4104/p4104 ks86p4004/p4104 otp 1 5- 3 v ss /v ss x in x out v pp /test p0.1 p0.0 p3.4/adc4 p3.3/adc3 p3.2/adc2 p3.1/adc1 p3.0/adc0 v dd/ v dd p0.2/ sclk p0.3/ sdat p0.4 p0.5 p0.6 p1.0/zcd p1.1/buz p1.2/t0(pwm) p2.0/int0 a v ref a v ss 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 KS86P4104 24-sdip (top view) note : the bolds indicate an otp pin name. reset reset/ figure 1 5-3 . pin assignment diagram ( 24 -pin sdip package)
ks86p4004/p4104 otp ks86c4004/p4004/c4104/p4104 15- 4 v ss /v ss x in x out v pp /test p0.1 p0.0 p3.4/adc4 p3.3/adc3 p3.2/adc2 p3.1/adc1 p3.0/adc0 v dd/ v dd p0.2/ sclk p0.3/ sdat p0.4 p0.5 p0.6 p1.0/zcd p1.1/buz p1.2/t0(pwm) p2.0/int0 av ref a v ss 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 KS86P4104 24-sop (top view) note : the bolds indicate an otp pin name. reset reset/ figure 1 5-4 . pin assignment diagram ( 24 -pin sop package)
ks86c4004/p4004/c4104/p4104 ks86p4004/p4104 otp 15- 5 table 15-1. descriptions of pins used to read/write the eprom main chip during programming pin name pin name pin no. i/o function p0.3 sdat ks86p4004: 28 (30) KS86P4104: 22 (22) i/o serial data pin (output when reading, input when writing) input and push-pull output port can be assigned p0.2 sclk ks86p4004: 29 (31) KS86P4104: 23 (23) i/o serial clock pin (input only pin) test v pp (test) 4 i power supply pin for eprom cell writing (indicates that otp enters into the writing mode). when 12.5 v is applied, otp is in writing mode and when 5 v is applied, otp is in reading mode. (option) reset reset 7 i chip initialization v dd /v ss v dd /v ss ks86p4004: 30 (32) / 1 KS86P4104: 24 (24) / 1 i logic power supply pin. note : ( ) means the sop otp pin number. table 15-2. comparison of ks86p4004/p4104 and ks86c4004/c4104 features characteristic ks86p4004/p4104 ks86c4004/c4104 program memory 4-kbyte eprom 4-kbyte mask rom operating voltage (v dd ) 2.7 v to 5.5 v 2.7 v to 5.5 v otp programming mode v dd = 5 v, v pp (test) = 12.5 v pin configuration 30 sdip/32 sop/24 sdip/24 sop eprom programmability user program 1 time programmed at the factory operating mode characteristics when 12.5 v is supplied to the v pp (test) pin of the ks86p4004/p4104, the eprom programming mode is entered. the operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in table 15-3 below. table 15-3. operating mode selection criteria v dd vpp (test) reg/ mem address (a15-a0) r/ w mode 5 v 5 v 0 0000h 1 eprom read 12.5 v 0 0000h 0 eprom program 12.5 v 0 0000h 1 eprom verify 12.5 v 1 0e3fh 0 eprom read protection note : "0" means low level; "1" means high level.
ks86p4004/p4104 otp ks86c4004/p4004/c4104/p4104 15- 6 notes

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